A Denoising Architecture For Removing Impulse Noise In Image

Abstract

Image is a powerful medium to convey visual information. During image transmission and acquisition, the impulse noise is corrupted in the field of digital image processing applications of transmission and reception due to unwanted disturbance. The proposed cloud noise filtering algorithm and VLSI architecture is used to remove the impulse noise is better than other methods. Extensive experimental results demonstrate that our method can obtain better performances in terms of both subjective and objective evaluations than those state-of-the-art impulse denoising techniques. The proposed our VLSI architecture can achieve low power consumption of 150mw. The design requires only low computational complexity and two line memory buffers. Its hardware cost is low and suitable to be applied to many real-time applications

Keywords

Cloud noise reduction, Edges details, Image quality and Impulse noise detector.

INTRODUCTION

The basic idea of image denoising techniques is used to detect and remove the impulse noise during image transmission and acquisition at the acquiring end due to various disturbances in the field of digital image processing at real time applications like Astronomy, Medical imaging, Scanning techniques, Printing skills, License plate recognition, Face recognition and so on. Different types of noise frequently contaminate images. According to the distribution of noisy pixel values, impulse noise can be classified into two categories: Fixed-Valued impulse noise and Random-Valued impulse noise. The Fixed Values impulse noise is also known as “Salt and Pepper Noise” since the pixel value of a noisy pixel is either minimum or maximum value in grayscale images. The values of noisy pixels corrupted by random valued impulse noise are uniformly distributed in the range of [0, 255] for gray-scale images. Removal of Random valued impulse noise is more complicated due to the random distribution of the noise pixels.

In this paper, the main focus is on the detection and correction of the random value impulse noise from the corrupted image. Recently many methods have been proposed for the removal of impulse noise from the image. Some of them employ the standard median filter or its modifications. However, these approaches might blur the image since both noisy and noise-free pixels are modified. To avoid the damage on noise-free pixels, an efficient switching strategy has been proposed in the related works. In general, the switching median filter (Non-linear technique) consists of two steps: 1) impulse detection and 2) noise filtering. It locates the noisy pixels with an impulse detector, and then filters them rather than the whole pixels of an image to avoid causing the damage on noise-free pixels. But these filter work well with low noise ratios, and are very poor when the noise ratio reaches above 40%.

In this proposed technique, a cloud algorithm performs preserves the image details effectively than other older technique. The design uses two steps: impulse noise detection and mean filtering. The mean filtering does not affect the edges or other small structures in the image. This method is more important for the restoring of corrupted images. The proposed VLSI architecture requires simple computations and two line memory buffer. In this proposed technique identifies the corrupted pixels and only those pixels are processed and recovered from the filter (corrector) part.

II. RELATED WORKS

In Tao Chen, Kai-Kuang Ma and Li-Hui Chen (1999) [6] proposed a Tri-State Median Filter for Image Denoising. A novel nonlinear filter, called tri-state median (TSM) filter, is proposed for preserving image details while effectively suppressing impulse noise. The simulation result of the proposed filter consistently outperforms other median filters by balancing the tradeoff between noise reduction and detail preservation. To achieve better results, a camera calibration procedure may be placed before our system. For different values of noise density, optimum threshold range for yielding smallest MSE values and good visual quality can be obtained through similar simulation experiments.

In Zhou wang and David zhang (1999) [7] proposed a new median based filter, i.e., Progressive switching median (PSM) filter to restore images corrupted by salt & pepper noise. This algorithm was developed by two main concepts 1) switching scheme based image filters 2) progressive methods –impulse detection and noise filtering procedures are progressively through several iterations. The Simulation results demonstrate that the proposed algorithm is better than traditional medianbased filters and is particularly effective for the cases where the images are very highly corrupted ratios ranging from 5% to 70% and MSE also better than other median based methods, especially when noise ratios are high. It can remove almost all of the noise pixels while preserve image details very well.

In Tao Chen and Hong Ren Wu (2001) [8] proposed a novel adaptive median filter that employs the switching scheme based on the impulse detection mechanism. i.e., Adaptive Impulse Detection Using Center-Weighted Median (ACWM) Filters. The Extensive simulations that the proposed filter consistently works well in suppressing both types of impulses: fixed & random valued impulse with different noise ratios.

In Tao Chen and Hong Ren Wu (2001) [9] proposed a generalized framework of median based switching schemes, called multi-state median (MSM) filter. By using simple thresholding logic, the output of the MSM filter is adaptively switched among those of a group of center weighted median (CWM) filters that have different center weights. This proposed MSM filter is equivalent to an adaptive CWM filter with a space varying center weight which is dependent on local signal statistics. The proposed extensive simulations MSM filter produces better performance than the other median based filters, being consistently effective in noise suppression and detail preservation for various images corrupted at different noise ratios.

In Yiqiu Dong and Shufang Xu (2007) [17] proposed a New Directional Weighted Median Filter for Removal of Random-Valued Impulse Noise. This proposed a new impulse detector, which is based on the differences between the current pixel and its neighbors aligned with four main directions. Then, we combine it with the weighted median filter to get a new directional weighted median (DWM) filter. These Extensive simulations that the proposed filter not only can provide better performance of suppressing impulse with high noise level but can preserve more detail features, even thin lines. As extended to restoring corrupted color images, this filter also performs very well. Simulation results show that the DWM filter performs much better than many existing median-based filters in both subjective and objective (PSNR) evaluations. Especially, it can preserve edges very well, even thin lines, as removing noise. In addition, it can be extended to restore the corrupted images by random-valued impulse noise and also performs well.

Shih-Chang Hsia [2003] proposed an efficient noiseremoval algorithm using an adaptive digital signalprocessing approach. Simulations have demonstrated that the new adaptive algorithm could efficiently reduce impulse noise even in highly corrupted images. In order to achieve real-time implementation, a cost-effective architecture is proposed using a parallel structure and pipelined processing. The proposed processor can achieve the throughput rate of 45M pixels/s using only 4k gates and two line buffers. Unlike median-filtering chips, this processor provides better filtering quality and its circuit is much less complex.

An efficient low cost VLSI architecture for the edge preserving impulse noise removal technique has been proposed by Deepa et al [2010]. The architecture comprises of two line buffers, register banks, impulse noise detector, edge oriented noise filter and impulse arbiter. The storage space required for the proposed hardware is two line buffer rather than full frame memory. Moreover, proposed algorithm involves only fixed size window instead of variable window size. These two greatly reduces storage requirement as well as computation complexity. The impulse noise detector turns off the remaining circuitry if the current pixel is noise free, thus reducing power consumption. Further, the four stage pipeline architecture greatly improves the speed of operation. The implemented edge preserving algorithm results in better visual quality for denoised image. Thus the proposed architecture has less complexity, less storage requirement, low power consumption and improved speed of operation.

A decision-tree-based impulse noise detector to detect the noisy pixels, and an edge-preserving filter to reconstruct the intensity values of noisy pixels was employed by Lien et al [2010]. Furthermore, an adaptive technology is used to enhance the effects of removal of impulse noise. Our extensive experimental results demonstrate that the proposed technique can obtain better performances in terms of both quantitative evaluation and visual quality than the previous lower complexity methods. Moreover, the performance can be comparable to the higher complexity methods. The VLSI architecture of our design yields a processing rate of about 200 MHz by using TSMC 0.18 μm technology. Compared with the state-of-the-art techniques, this work can reduce memory storage by more than 99 percent.

The design requires only low computational complexity and two line memory buffers. Its hardware cost is low and suitable to be applied to many real-time applications.

III. PROPOSED ALGORITHM

The proposed noise filtering is used to image which is to be denoised. The detector determines whether pi,j is a noisy pixel by using the noise detector and the correlation between pixel pi,j and its neighboring pixels. If the image pixel value is corrupted, the similarity factor between the current pixel under process and the pixels in the optimum direction is estimated and compared with the threshold value to check whether the current pixel is noisy or original pixel and finally generates the reconstructed value. Otherwise, the value will be kept u nchanged.

IV. SIMULATION RESULTS

The proposed noise filtering filter the noise corrupted pixels and tested using MATLAB and its results are evaluated with the existing noise filtering algorithms. In order to verify the characteristics, the quality of denoised images of the modified denoising algorithm, a number of simulations are carried out on the well-known benchmark test images: Boat, House and Gold hill.

For the test image, the corrupted versions of it is generated using MATLAB with impulse noise at high density of 50%. Then we employ the proposed algorithm to detect impulse noise and restore the corrupted image. Tabule I show the comparision of PSNR value of proposed method (PM) filter and other existing filters. Figure 1 shows the simulation results obtained using MATLAB and Figure 2 show the graphical results for denoised image waveforms.

A. Evaluation details of hardware architecture

The proposed filtering algorithm and its hardware architecture system and tested over various versions of virtex5 FPGA family device against their gate counts and power, The results are tabulated in Tables II and also graphically plotted in Figure 3. The proposed work results show that the system incorporated with its hardware architecture leads to lower power consumption than existing DTDBM methods. Figure 3 show the graphical results for denoised of gate counts and power consumption.

Fig. 3 shows the graphical results for gate counts and power consumption of Virtex Family of denoising architecture.

V. CONCLUSION

The proposed method of hardware implementation of denoising architecture for removing the random value impulse noise and also reduce the gate counts and power consumption of 150mW. . For a 512×512 8-bit gray-scale test image, only two line buffer (512×2×8 bits) is required in our design. Most of the promising methods need to buffer a full image (512×512×8 bits).The proposed design requires simple computations and two line memory buffers only. Hence its hardware cost is low, which is an important concern in Hardware Design.

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