International Journal of Innovative Research in Science, Engineering and Technology
MenuISSN ONLINE(2319-8753)PRINT(2347-6710)
ISSN ONLINE(2319-8753)PRINT(2347-6710)
| Pramathesh Trivedi Third Year Electronics Engineering, Atharva College of engineering, Mumbai, Maharashtra, India |
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With the advancement in the field of micro processors and micro controllers, PIC 18 an invention of these millennia is proving to be one the promising controller. In the following context, some features of PIC 18 are highlighted.
Keywords |
| PIC 18, Memory organization, Pipelining, Instruction format, Addressing modes, RISC, Instruction set |
INTRODUCTION |
| Product of Microchip technology, PIC falls under family of Modified Harvard architecture Microcontroller. Controller being different from processors, due to inclusion of I/O, Memory and Processor in one single chip is compact and power saving. Controllers though not capable of fast processing as microprocessor but are widely used because of compact and power saving feature which is required in daily appliances ,where processing is not issue but cost and power availability is. PICs are popular due to their wide availability, low cost, large user base, availability of low cost development tools. [1] |
II. MEMORY ORGANIZATION |
| Due to availability of different on chip data memory and program memory, both are available at same for access. |
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| As seen from diagram above, address bus to access program memory is 21 bit, thus can access at most 2 MB instructions. Since one memory location can store one byte information 21 bit equals 221 locations=221 bytes =2MB While instruction bus to access instructions is 16 bit long, reason being, almost all instructions of PIC 18 are 16 bit instructions, and thus having 16 bit instruction bus would ensure fetching of all instruction in one cycle. |
| For data memory, address bus provided is 12 bit long thus can access at most 212 locations=212 bytes=4096 bytes=4kB. While corresponding data bus is 8 bit long, reason being PIC 18 can perform only 8 Bit operations. |
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| PIC18 data memory is implemented as SRAM. Every location of data memory is referred as register or file register. Due to condition applied on size of instruction, only 8 bit of address is specified in instruction. Thus can specify 256 addresses (28bits =256 addresses).so as to access whole memory, data memory is divided into 16 banks, each having 256 registers. Bank selection is possible with help of BSR register i.e. Bank select register. All special function registers i.e. SFRs are present at end i.e. Bank 15,so as to access SFRs along with general purpose registers, Access bank is used which has 128 generals purpose registers from bank 0 which other 128 SFRs from Bank 15. PIC 18 has 21 bit program memory counter, thus can access maximum 2 MB memory space. While stack in PIC is not part of Program memory, it is 31 entries each capable of storing 21 bits, present only to store return address of in case of interrupts and calls. Address 0X000000 is assigned to reset vector, which is the starting address after power on. The address 0X000008 is assigned as starting address of ISR of high priority interrupt while address 0x000016 is starting address of ISR of low priority interrupt. |
III. PIPELINING |
| PIC being a true RISC processor executes perfect pipelining with less pipelining bubbles compared to a CISC processor. Pipelining is fetching of next instruction while current instruction is still being executed. This leads to better and speedy performance thus saving time. PIC performs a two stage pipelining i.e. it fetches instruction along with execution at same time which is performed very efficiently due to presence of different program and data memory and busses accessing them. A detailed illustration of time saved due to pipelining is as follows. |
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| Though pipelining is very beneficial, it too has some drawbacks namely: data dependency hazard and control hazard. Data dependency hazard occurs when result of current instruction acts as an operand for next instruction. Thus next instruction must be performed only after execution of current instruction. Or else value obtained would nothing but garbage value. Thus various algorithms are implemented to solve this problem. Control hazard results due to Branch instructions. Because of pipelining next corresponding instruction is fetched for execution, but if current instruction happens to a branch instruction than program counter changes its value accordingly and next instruction which was already fetched is to be discarded leading to pipelining bubbles. |
IV. INSTRUCTION FORMAT |
| There are five types of instruction format namely |
| ïÃâ÷ Byte-oriented operations |
| ïÃâ÷ Byte-to-Byte operations |
| ïÃâ÷ Bit-oriented file register operations |
| ïÃâ÷ Literal operation |
| Control operations |
| ïÃâ÷ Byte-oriented operations |
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V. ADDRESSING MODES |
| Manner in which operands are specified in an instruction is called addressing modes. PIC 18 provides following addressing modes: |
| ïÃâ÷ Register direct: PIC 18 uses an 8-bit value to specify a data register as an operand. The register may be in access or other banks. Eg: movwf 0x0C, BANKED |
| ïÃâ÷ Immediate Mode: Actual operand is provided in the instruction, thus no need to access any memory location. Eg: movlw 0x20 |
| ïÃâ÷ Inherent Mode: In this mode operands are implied in Opcode field, thus instruction does not provide address of implied Opcode Eg: addlw 0x81 |
| ïÃâ÷ Indirect Mode: When a special function register is used to point to data memory than such addressing mode is called Indirect addressing mode. Eg: movwf INDF0 |
| ïÃâ÷ Bit direct addressing mode: This instructions deal with bit level operations. Eg: BCF PORTB, 3, A |
VI. INSTRUCTION SET |
| PIC 18 has 77 instructions of which only four instructions are 32 bit long while rest are 16 bit long. Complete instruction set is as follows. [4] |
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VII. CONCLUSION |
| With the benefits like parallel I/O ports, timer functions, C-Language friendly architecture, perfect RISC based architecture, perfect pipelining and compact but powerful instruction set; PIC 18 has proved to be ground shaking device. With the few faults of Intel micro controllers corrected PIC 18 not only shows better potential but also shows that its future in field of micro controllers is secured. Thus with all the benefits available at a cheap price PIC 18 has become favourite of hobbyist. A simple instruction set and seamless migration between product families make PIC microcontrollers the logical choice for design requiring flexibility and performance. |
ACKNOWLEDGMENT |
| Information sourced from microchip technology’s datasheets. |
References |
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