Research Article Open Access

Design and Implementation of ASIC controller for T/R Module of Active Phased Array Radars

Abstract

Transmit/Receive Modules (T/R Modules) are vital parts of modern phased array radar systems. The T/R modules are controlled using T/R module controllers (TRMC’s) which generate the necessary control signals for beam steering and calibration. Present day TRMC’s are FPGA based Dual T/R module controllers (DTRMC’s). A single DTRMC controls two T/R modules. In this paper we propose the design and implementation of ASIC (Application Specific Integrated circuit) to replace the existing FPGA based DTRMC’s. Also the controller is designed as a Quad TRMC (QTRMC) capable of controlling four T/R modules. The design of the major blocks (UART and Decoding logic) of the controller are discussed. The design is carried out in VHDL and simulated using Xilinx 12.4 with Spartan 3E XC3S250E-5ft256 as target device.

Harish D, Somsing Rathod, Amit Goel, Dr.G.Sadashivappa

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