Research Article Open Access

RISC SYSTEM DESIGN IN XILINX

Abstract

This paper presents the Reduced Instruction Set Computer (RISC) system using VHDL and the results are analyzed in an FPGA system . This paper presents a RISC processor designing to achieve OR, AND, NAND, NOR, XOR, XNOR, ADD, SUBTRACT, NOT, INCREMENT, DECREMENT, etc operations. The 20-bit RISC system has high general-purpose register (GPR) orthogonality and communicates to peripheral devices via a serial bus.

Deepak Kumar, K.Anusudha

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