Seven Level Inverter Based Shunt Hybrid Active
Power Filter Topology for Harmonic Reduction

G. Jayakrishna; B.Vamsipriya

Seven Level Inverter Based Shunt Hybrid Active Power Filter Topology for Harmonic Reduction

*G. Jayakrishna¹, B.Vamsipriya²

Professor, Department of EEE, Siddharth Institute of Engineering and Technology, Puttur, Andhra Pradesh, India
PG student, Department of EEE, Siddharth Institute of Engineering and Technology, Puttur, Andhra Pradesh, India

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Abstract

This paper presents a three-phase asymmetric cascaded seven level inverter (ACSLI) based Shunt Hybrid Active Power Filter (SHAPF) topology for harmonic reduction in medium voltage test system (MVTS). The proposed SHAF topology consists of ACSLI based shunt active power filter (SAPF) and shunt passive filters (SPF) connected in parallel with the load. The SHAPF topology compensates harmonic currents drawn by non-linear load. The compensation process is based on concept of synchronous reference frame theory (SRFT) used for reference compensation current estimation, carrier switching frequency sub-harmonic pulse width modulation (CSFSHPWM) for generating switching signals for ACSLI, fuzzy logic controller (FLC) for maintaining DC bus capacitor voltage constant. Three types of shunt passive filters namely single tuned, double tuned and high pass filter are used individually for enhancing the harmonic filtering performance of ACSLI based SAPF. The proposed SHAPF topology is validated through MATLAB/SIMULINK simulation for MVTS and the results were presented.

Keywords

Asymmetric cascaded seven level inverter, Shunt hybrid active power filter, Synchronous reference frame theory, Fuzzy logic controller, Shunt passive filter.

INTRODUCTION

The usage of nonlinear loads at high voltages is increasing in industry day-by-day leading to harmonic pollution in the line current, increased losses, poor system performance and efficiency. The conventional two level active filters have limitations in medium and high voltage applications due to semiconductor reverse voltage rating constraint, high power loss, high level of dv/dt causing switching noise hence electromagnetic interference with communication system, as well as insulation degradation in electronic and electrical systems [1]. The development of multilevel inverter (MLI) has become the option for reactive power compensation and power quality improvement. Multilevel inverter topologies such as diode clamped, flying capacitor and cascade H-bridge inverters are available in the literature [2]. Out of these topologies cascade multilevel inverter requires less number of components to produce same number of levels [3]. Cascaded inverters are modified to asymmetric cascaded multilevel inverter (ACMLI) topologies to reduce number of switches with each DC source driven at different voltage level [4]. Defining ‘S’ as the cell number and n=1,2,…S, the ACMLIs are classified as MLI with(2S-n)* VDC factor and with (3S-n)*VDC factor . In this paper MLI with (2S-n)* VDC factor is used as SAPF. In this configuration the magnitude of DC voltage sources will increase by a factor (2S-n). The output waveform has number of levels equal to (2S+1 -1)[5]. In active power filter application there is no need of active power output from the inverter, therefore a separate DC source for each converter bridge is not required. Hence in this paper single DC source is used and the other storage device is replaced by a capacitor.

OPERATION OF ACSLI BASED SHAPF

The test system with ACSLI based SHAPF compensation is shown in Fig.1. It consists of a three phase medium voltage AC source connected to nonlinear diode rectifier load through a line. An ACSLI based SAPF and shunt passive filter are connected in parallel with the load. In the operation of APF, the harmonic component of load current is derived through harmonic detection circuit and reverses it as the reference compensation current. Then switching signals for ACSLI are generated such that AC side output current of APF correctly traces reference current and provides the harmonic current of the load, so that source current will be free from harmonics and approaches towards sinusoidal. In addition to SAPF, SPF is connected in parallel with the load to bye-pass some selected harmonics so that burden on active filter reduces and its filtering performance increases.

SIMULINK MODEL OF MVTS WITH PROPOSED ACSLI BASED SHAPF COMPENSATION

The test system consists of a three phase AC source of voltage 4500 V(peak) and 50 Hz frequency connected to a nonlinear diode rectifier load through a source and line combined reactance of 15mH/phase. The R-L load on the DC side of diode rectifier is 20 ohm and 0.1 mH.

A. Three Phase ACSLI

The three phase ACSLI consists of two H-bridge cells namely low voltage (LV) cell of 1.5kV and high voltage (HV) cell of 3kV connected in series. Each H-bridge cell is constructed using four IGBTs with anti-parallel diodes. Since VHV is two times VLV, it can produce seven levels in its output wave form via +4.5kV,3 kV,1.5 kV,0,-1.5 kV,-3 kV and -4.5 kV. A DC source of 3 kV is used as storage device in HV cell and a capacitor of 4000 μF is used on the DC side of LV cell. The DC-bus capacitor value is taken large enough to minimize the variation of its voltage based on the general principle that capacitor load time constant to be ten times to that of fundamental period [5].

B. Control Strategy of ACSLI

The control strategy of ACSLISAPF includes SRFT for estimating reference compensating current, CSFSHPWM for generating gating signals and FLC for maintaining LV cell capacitor voltage constant.

1) Synchronous reference frame theory (SRFT): The time domain methods namely instantaneous reactive-power theory and Synchronous reference frame theory (SRFT) are most commonly used for estimating reference compensating current [6]. SRFT transforms the three phase system voltage and current variables into a stationary reference frame using Park’s transformation. The active and reactive components of the three-phase system are represented by the direct and quadrature components respectively. The fundamental components are transformed into DC quantities which can be separated easily through filtering. The system with this technique is very stable since the controller deals mainly with DC quantities and the computation is instantaneous [7]. Suppose the three phase AC source currents are Isa,Isb,Isc, non-linear load currents are ILa,ILb,ILc and active filter compensating currents are Ifa,Ifb,Ifc. The load currents in a-b-c reference frame can be converted in to d-q reference frame using Park’s transformation as shown in equation (1)

These currents can be decomposed into DC component and harmonic component as shown in equation (2).

The harmonic component of load current is obtained by using a low pass filter and subtracting output of LPF from total load current as shown by eqn. (3).

These reference currents are transformed into a-b-c coordinates by applying Inverse Park’s transformation as shown in eqn. (4).

The SIMULINK model of SRFT used to estimate reference compensating current is shown in Fig. 3. The cut –off frequency of low pass filter is selected as 75 Hz.

2) Carrier switching frequency sub-harmonic PWM: Most commonly used modulation techniques for MLIs are Selective harmonic elimination method[8], Space vector PWM method and Carrier based PWM methods[9,10], out of which CSFSHPWM is used in this paper due to its fast response, simple computation and its suitability for MLIs. The MATLAB/SIMULINK model of CSFSHPWM for Phase–a is illustrated in Fig. 4. In this technique six triangular signals each of 2 kHz frequency(fc) and magnitude(Ac) of 0.33 and displaced vertically are used as carrier signals and the sinusoidal voltage wave form obtained from compensating reference current estimator is used as modulating signal as shown in Figure. 5. The reference waveform has peak to peak amplitude Am, the frequency fm, and its zero centered in the middle of the carrier set. The reference is continuously compared with each of the carrier signals. If the reference is greater than “s” carrier signal, then they active device corresponding to that carrier is switched off. In multilevel inverters, the amplitude modulation index “Ma” and the frequency ratio “Mf” are defined as

3) Fuzzy Logic based LV cell DC Voltage Controller: Various types of controllers like Proportional-Integral (PI), adaptive, Neuro and Fuzzy Logic Controller (FLC) for DC bus voltage regulation are well presented in literature [11]. Since the fuzzy control rules are not derived from a heuristic knowledge of the system behavior, neither precise mathematical model nor complex computations are needed and is based on human like linguistic terms in the form of IF-THEN rules to capture the non-linear system dynamics, FLC is adopted in this paper to control LV Cell DC bus capacitor voltage. The LV cell DC bus voltage is compared with reference voltage of 1.5 kV to generate error signal. The error and its derivative are applied to FLC to obtain control signal which in turn applied to reference compensating current estimator to control the gating signals of VSI to maintain constant DC bus capacitor voltage at LV cell.

The two inputs and the output of FLC use seven triangular membership functions namely Negative Big (NB), Negative Medium (NM), Negative Small (NS), Zero(ZE), Positive Small (PS), Positive Medium(PM), Positive Big(PB). The membership values of input and output variables are shown in Fig. 6. Each input has seven linguistic variables, therefore there are 49 input label pairs. A rule table relating each one of 49 input label pairs to respective output label is given in Table 1. The type of fuzzy inference engine used is Mamdani and the Centroid method is used for defuzzification.

C. Shunt Passive Filter (SPF) :

It is connected in parallel with the load to eliminate the effect of some selected harmonics. Three types of shunt passive filters namely single tuned filter, double tuned filter and high pass filter are used whose configurations are shown in Figure. 7. In first case the SPF is constructed by using two single tuned passive filters connected in parallel in each phase and tuned to absorb 5th and 7th harmonic currents in the load current. The 5th order filter consists of a series R-LC branch with a capacitor (C5), inductance (L5) and resistance (R5) and 7th order filter consists R7, L7 and C7 in series. Quality factor of the filter is selected as 75 and the filter capacitance value is fixed at 30μF[12]. The parameter values of the single tuned passive filter are R5=0.2829Ω, L5=13.504 mH, C5 =30μF, R7= 0.2021Ω, L7= 6.892 mH and C7 =30μF.

Design parameters of double tuned filter for absorbing 5th and 7th harmonic currents obtained at Q = 75 are C=30μF, L=9.64mH and R= 1344.65ohms. Design parameters of high pass passive filter at Cutoff frequency=50Hz and Quality factor of 75 are C = 30μF, R=70.73ohms and L=2mH.

RESULTS AND DISCUSSION

The simulation results of MVTS without any compensation are presented first, followed by basic ACSLI based SAPF compensation and the proposed ACSLI based SHAPF compensation. The performance of ACSLI based SAPF and ACSL based SHAPF with different passive filters for mitigating harmonics in MVTS is compared.

A. Results of MV Test System without any compensation

As can be seen in Fig. 8(a), that the current drawn by diode rectifier load is highly distorted and deviated significantly from sinusoidal waveform due to which the source current and source voltages are also distorted as shown in Figs.8(b) and 8(c).

The distortion in the source voltage waveform is due to the presence of source and line inductance and distorted currents drawn by the load. The total harmonic distortion in source current of phase-a without any compensation is 12.4% as shown in the harmonic spectra of Figure 8(d). It is seen that the most dominant are 5th and 7th order harmonics in the spectra plot.

B. Results of MVTS with basic ACSLI based SAPF Compensation

The Fig. 9 shows the single phase and three phase seven level output voltage wave forms of ACSLI based SAPF from which it is evident that CSFSHPWM worked effectively and produced seven levels in the output voltage wave form.

The three phase compensating currents of ACSLI based SAPF shown in Fig. 10(a) are effectively compensated the load current harmonics and the source current approached sinusoidal as shown in Fig. 10(b). The THD in source current of phase-a is reduced from 12.4% to 3.51% as shown in Fig.10(c). The ACSLI based SAPF successfully filtered the harmonic current components caused by the nonlinear load. Although the high frequency harmonic components are filtered significantly, appreciable amount of lower order harmonics (5th, 7th,11th…..) still remain in the source current spectrum. The most dominant are 5th and 7thorder harmonics.

C. Results of MVTS with proposed ACSLI based SHAPF Compensation

The three phase compensating currents of ACSLI based SAPF and TPF in SHAPF topology are shown in Fig. 11(a) and 11(b). Due to these compensating currents source current became sinusoidal as shown in Fig. 11(c) and its THD is reduced to 1.01% as shown in spectra plot of Fig. 11(d).

The source current THDs with ACSLI based SAPF and ACSLI based SHAPF compensations with different shunt passive filters are compared in Table II.

CONCLUSIONS

The SRFT based compensating current estimator worked effectively in estimating compensation current and CSFSHPWM produced switching signals for ACSLI to produce seven levels in the output voltage. Based on the results, the proposed SHAPF topology is capable of responding effectively to the harmonics caused by the three-phase diode rectifier load and compensated the harmonics effectively. The total harmonic distortion of the source current without any compensation is 12.4 % in each phase and it is reduced to 3.51% with ACSLI based SAPF and to 1.01% for phase-a with proposed ACSLI based SHAPF compensation which is fairly good. Thus the performance of SAPF is improved by connecting shunt passive filters in the proposed ACSLI based SHAPF topology.

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